Each CPLD family members has more than one ways of I/O pin termination available to avoid pins from floating at high-impedance and causing noise and exorbitant power dissipation.

Each CPLD family members has more than one ways of I/O pin termination available to avoid pins from floating at high-impedance and causing noise and exorbitant power dissipation.

Controlling I/O Termination

This topic contains details about configuring I/O.

These termination techniques range from the weak resistive pull-up circuit, the p r keeper circuit ( also known as a “bus hold” circuit) and user-configurable ground pins. Continue reading “Each CPLD family members has more than one ways of I/O pin termination available to avoid pins from floating at high-impedance and causing noise and exorbitant power dissipation.”